Join As Memory Mask Design Engineer At NVIDIA | Apply Now
Job Overview:
| Company | NVIDIA |
|---|---|
| Job Role | Memory Mask Design Engineer |
| Job ID | JR2018297 |
| Work Location | Bengaluru |
| Work Mode | Hybrid |
| Job Type | Full time |
| Experience | 2+ years |
| Qualification | B.E / B.Tech / M.Tech |
| Salary | Not disclosed |
| Careers Page | www.nvidia.com |
Skills: Cadence CMOS IC Layout Memory Layout Floor Planning EDA Tools
Join NVIDIA as a Memory Mask Design Engineer in Bengaluru
NVIDIA is hiring a Memory Mask Design Engineer with two or more years of experience for its Bengaluru office. This full-time role involves working on high-performance CMOS integrated circuits and memory layouts.
Who Can Apply?
- Hold a B.E, B.Tech, or M.Tech in Electronics or possess equivalent experience.
- Have 2+ years of proven experience in memory layout within advanced CMOS processes.
- Possess knowledge of layout basics like bitcells, decoders, LIO, matching devices, and signal shielding.
- Familiar with floor planning, block-level routing, and macro-level assembly.
About NVIDIA:
NVIDIA's invention of the GPU sparked the growth of PC gaming, redefined computer graphics, and revolutionized parallel computing. Today, the company leads research in artificial intelligence by providing massively parallel computation horsepower.
What You Will Do as Memory Mask Design Engineer
- IC Layout Implementation: Implement IC layout of innovative, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 3nm, 5nm, 7nm and lower nodes following industry standard methodologies.
- Memory Circuit Deliverables: Deliver layouts for Full Custom Memory group specializing in digital Memory circuits with significant digital components.
- Best Practices: Adopt and put in place the best layout practices and methodology for composing digital Memory layouts while following company procedures.
Skills Required:
Tools and Software. Detailed knowledge of industry-standard EDA tools for Cadence.
Circuit Design. Experience with high-performance memories, bitcells, decoders, LIO, and signal shielding.
How to Prepare
Our tips, based only on what the listing asks for:
- Brush up on industry-standard EDA tools, particularly Cadence.
- Review advanced CMOS process nodes such as 3nm, 5nm, and 7nm.
- Prepare for questions on top-level verification, EM/IR quality checks, and layout dependent effects.
What the Listing Does Not Mention
- No salary or compensation package is stated.
- No application deadline or last date is provided.
- No selection process details or interview rounds are mentioned.
How to Apply: NVIDIA
- Visit the official application page using the apply link.
- Review the job description and requirements thoroughly.
- Submit your application and resume online.
Build your career in cutting-edge GPU and semiconductor technology with NVIDIA.
Important Links:
| Events | Links |
|---|---|
| Apply Now | Click Here |
| Official Careers Page | Click Here |
Frequently Asked Questions:
What qualification is required?
Required qualification: B.E / B.Tech / M.Tech. See the eligibility section above for details.
Is experience required for this role?
Yes, 2+ years of proven experience in memory layout is required.
Where is the job located?
The job is located in Bengaluru, India.
What is the work mode?
The listing indicates a hybrid work arrangement.
Stay safe: NVIDIA does not charge any fee to apply or to give an interview. If anyone asks you for money for a job, a referral or an offer letter, it is a scam.
Source: the official NVIDIA careers listing for this role.
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Disclaimer: This job post is for information only. All applications and questions should go to NVIDIA through the official process.
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